DocumentCode :
3379151
Title :
Template-mask design methodology for double patterning technology
Author :
Hsu, Chin-Hsiung ; Chang, Yao-Wen ; Nassif, Sani Richard
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2010
fDate :
7-11 Nov. 2010
Firstpage :
107
Lastpage :
111
Abstract :
Double patterning technology (DPT) has recently gained much attention and is viewed as the most promising solution for the sub-32-nm node process. DPT decomposes a layout into two masks and applies double exposure patterning to increase the pitch size and thus printability. This paper proposes the first mask-sharing methodology for DPT, which can share masks among different designs, to reduce the number of costly masks for double patterning. The design methodology consists of two tasks: template-mask design and template-mask-aware routing. A graph matching-based algorithm is developed to design a flexible template mask that tries to accommodate as many design patterns as possible. We also present a template-mask-aware routing (TMR) algorithm, focusing on DPT-related issues to generate routing solutions that satisfy the constraints induced from double patterning and template masks. Experimental results show that our designed template mask is mask-saving, and our TMR can achieve conflict-free routing with 100% routability and save at least two masks for each circuit with reasonable wirelength and runtime overheads.
Keywords :
graph theory; masks; double exposure patterning; double patterning technology; graph matching-based algorithm; template-mask design methodology; template-mask-aware routing; Algorithm design and analysis; Layout; Routing; Tiles; Tunneling magnetoresistance; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Print_ISBN :
978-1-4244-8193-4
Type :
conf
DOI :
10.1109/ICCAD.2010.5654288
Filename :
5654288
Link To Document :
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