A new rail-to-rail comparator with adaptive power control for low power SAR ADCs in biomedical application

In this paper, a new 1 V rail-to-rail comparator is presented with low noise, high speed and low power consumption. We utilize current mirrors to overcome the kickback noise. A new adaptive power control (APC) technique is also proposed to minimize the power dissipation of the comparator. Moreover, it provides an optimized and stable power dissipation irrelative to process and bias variation. A prototype IV rail-to-rail SAR ADC for biomedical application has been implemented in 0.18 μm TSMC CMOS technology. It consumes 2.86 μW at 250kS/s and the figure of merit is 85.7 fJ/conversion-step. It shows that this work efficiently reduces 52% to 80% power consumption of the dynamic comparator at 500kS/s to 125kS/s.