Crosstalk reduction technique on data-bus in DSM technology

In Deep-submicron (DSM) and Very Deep-submicron (VDSM) technologies, Scaling the minimum feature size of VLSI circuits has caused the crosstalk noise to become a serious problem, degrading the performance and reliability of high speed integrated circuits. In many digital processors and SoC interconnects and buses are dominating the silicon area than the logic. These interconnects are prone to errors due to crosstalk. The major part of the crosstalk is due to coupling transitions occurring on the data bus and interconnects when signals are transmitted. Reducing the crosstalk is an important design factor. This crosstalk introduces errors on the data bus there by affecting the reliability of the system. This crosstalk can be reduced by reducing the coupling transitions. Hence reducing transitions can reduce crosstalk. One of the best techniques to reduce the crosstalk is to encode the data on the data bus. Hence Crosstalk efficient data bus encoding scheme is proposed which can reduce the 4C, 3C and 2C by 91% to 94%, 68% to 72%, 17% to 24% respectively.