DocumentCode
3379638
Title
Low noise linear voltage regulator for use as an on-chip PLL supply in microprocessors
Author
Shor, Joseph
Author_Institution
Intel Corp., Yakum, Israel
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
841
Lastpage
844
Abstract
A novel on-chip linear voltage regulator (VR), for use as PLL power supply is described. This voltage regulator exhibits a Power Supply Rejection Ratio (PSRR) of > 40dB and low thermal noise. Accurate current control enables optimized power and performance. These properties enable the VR to be utilized in PLL´s without adding any deterministic and random jitter. The VR has been designed and characterized in Intel´s recent leading-edge purely digital process.
Keywords
circuit noise; jitter; microprocessor chips; phase locked loops; thermal noise; voltage regulators; current control; deterministic jitter; low noise linear voltage regulator; low thermal noise; microprocessors; on-chip PLL supply; on-chip linear voltage regulator; power supply rejection ratio; random jitter; Bandwidth; Frequency; Impedance; Low voltage; Microprocessors; Packaging; Phase locked loops; Power supplies; Regulators; Virtual reality;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537431
Filename
5537431
Link To Document