Title :
Neural network based on-chip thermal simulator
Author :
Kumar, Pratyush ; Atienza, David
Author_Institution :
Embedded Syst. Lab. (ESL), Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland
fDate :
May 30 2010-June 2 2010
Abstract :
With increasing power densities, runtime thermal management is becoming a necessity in today´s systems, especially so for highly integrated Multi-Processor Systems-on-Chip (MPSoCs). In this paper, we propose a neural network (NN) based approach to implement an on-chip thermal simulator to aid such runtime management for MPSoCs. The proposed method combines the advantage of approximating the thermal properties of the chip as a linear system with the ease of fully parallel analog implementation of NNs. We perform a case study with the Niagara UltraSPARC T1 MPSoC for real-life applications, benchmarking our results with an accurate higher order Runge-Kutta (RK4) solver, that is employed in tools such as HotSpot. Within a few gate delays, the proposed NN design can simulate temperatures of the MPSoC 500 ms into the future - corresponding to thousands of iterations of the RK4 solver, with a maximum error of 1-2 K.
Keywords :
Runge-Kutta methods; multiprocessing systems; neural chips; system-on-chip; thermal analysis; Niagara UltraSPARC T1 MPSoC; high integrated multiprocessor system-on-chip; higher order Runge-Kutta solver; linear system; neural network based on-chip thermal simulator; thermal management; time 500 ms; Computational modeling; Delay; Differential equations; Network-on-a-chip; Neural networks; Power system management; Runtime; Temperature; Thermal management; Very large scale integration;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537439