DocumentCode
3379920
Title
Using timed Boolean algebra to solve false path problem in timing analysis
Author
Huang, Shiang-Tang ; Parng, Tai-Ming ; Shyu, Jyuo-Ming
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
1991
fDate
22-24 May 1991
Firstpage
172
Lastpage
176
Abstract
A new approach to the false path problem is proposed. The approach is based on an extended Boolean algebra and is capable of modeling the logic and timing behavior of logic networks in terms of modified Boolean functions. By applying algebraic manipulations, the approach can extract correct path delays as well as the input vectors for activating the sensitizable paths
Keywords
Boolean algebra; combinatorial circuits; logic CAD; algebraic manipulations; combinational logic network; correct path delays; false path problem; input vectors; logic behaviour; logic networks; modified Boolean functions; timed Boolean algebra; timing analysis; Added delay; Boolean algebra; Boolean functions; Circuits; Computational modeling; Data mining; Input variables; Intelligent networks; Logic functions; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1991. Proceedings of Technical Papers, 1991 International Symposium on
Conference_Location
Taipei
ISSN
1524-766X
Print_ISBN
0-7803-0036-X
Type
conf
DOI
10.1109/VTSA.1991.246688
Filename
246688
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