Title :
A new topology for fully differential amplifiers that enhances their tolerance to external disturbances
Author :
Fu, Guoyuan ; Mantooth, H. Alan ; Di, Jia
Author_Institution :
Electr. Eng. Dept., Univ. of Arkansas, Fayetteville, AR, USA
Abstract :
This paper presents a new topology for fully differential amplifiers (FDA). The unique feature of this topology is its three-stage cascaded structure with two dynamic common-mode feedback (CMFB) circuits in a single FDA. In comparison with traditional FDAs, this topology not only gains enhanced tolerance to device parameter variations caused by temperature, supply voltages, and other external disturbances, but also serves as a starting point to build three or more stages in a single FDA which helps achieve higher open loop gain. This topology has been successfully implemented in an FDA designed for extreme temperatures ranging from -180°C to 125°C using the 0.5μm SiGe BiCMOS process, and an FDA designed for extreme high temperature applications (up to 225°C) with the XI10-1μm Silicon-on-Insulator (SOI) process. In this paper, an FDA implementing this topology using 0.13μm CMOS 8RF-DM process is introduced, which is able to operate correctly across the temperature range of -180°C to 125°C and the supply voltage range of 0.72 V to 1.2 V (its nominal supply voltage is 1.2 V). Therefore, this new topology is a promising candidate for applications such as space exploration, remote control systems, bio-implantable devices, where high gain, wide temperature range, and better endurance to insufficient power supply are considered higher priority.
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; Ge-Si alloys; circuit feedback; differential amplifiers; silicon-on-insulator; CMOS 8RF-DM process; SiGe; SiGe BiCMOS process; device parameter variations; dynamic common-mode feedback circuits; external disturbances; fully differential amplifiers; open loop gain; silicon-on-insulator; size 0.13 mum; size 0.5 mum; temperature -180 degC to 125 degC; three-stage cascaded structure; voltage 0.72 V to 1.2 V; CMOS integrated circuits; Immune system; Phase measurement; Robustness; Switching circuits; Temperature measurement;
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
DOI :
10.1109/ASICON.2011.6157138