Advanced i-line lithography for 0.5 μm CMOS technology

Author

Yang, T. ; Fu, C.C. ; Wolf, T.M. ; Adams, T.E. ; Costigan, J.G. ; Ryan, J.L. ; Schrope, D.E. ; Stone, D.R. ; Cuthbert, J.D.

Author_Institution

AT&T Bell Labs., Allentown, PA, USA

fYear

1991

fDate

22-24 May 1991

Firstpage

22

Lastpage

27

Abstract

A cost-effective 0.5 μm lithographic capability has been developed using a reduction stepper with a 0.45 Na i-line lens and new photoresists. Resist processes provide excellent CD and sidewall angle control, with satisfactory exposure latitude. Resist pattern fidelity has been improved through computer-optimized reticle pattern modifications using serifs. Focus latitude has been significantly improved by application of new latent image metrology techniques. The authors provide an overview of these of other aspects and the lithographic process

Keywords

CMOS integrated circuits; integrated circuit technology; photolithography; 0.5 micron; advanced i-line lithography; computer-optimized reticle pattern modifications; critical dimension control; exposure latitude; focus latitude; latent image metrology; pattern fidelity; photoresists; reduction stepper; serifs; sidewall angle control; sub half-micron CMOS; Application software; Automatic control; Availability; CMOS technology; Focusing; Lenses; Linearity; Lithography; Metrology; Resists;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 1991. Proceedings of Technical Papers, 1991 International Symposium on

Conference_Location

Taipei

ISSN

1524-766X

Print_ISBN

0-7803-0036-X

Type

conf

DOI

10.1109/VTSA.1991.246719

Filename

246719