DocumentCode
3380547
Title
Towards the next generation of low-power test technologies
Author
Wen, Xiaoqing
Author_Institution
Dept. of Comput. Syst. & Eng., Kyushu Inst. of Technol., Iizuka, Japan
fYear
2011
fDate
25-28 Oct. 2011
Firstpage
232
Lastpage
235
Abstract
This paper first describes the basics of VLSI testing and the impact of test power. It then reviews the current status of low-power testing. It further highlights the needs for the next generation of low-power test technologies, which are critical for low-power devices in the deep submicron era.
Keywords
VLSI; integrated circuit testing; low-power electronics; VLSI testing; deep submicron era; impact; low-power device; low-power test technology; low-power testing; next generation; test power;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location
Xiamen
ISSN
2162-7541
Print_ISBN
978-1-61284-192-2
Electronic_ISBN
2162-7541
Type
conf
DOI
10.1109/ASICON.2011.6157164
Filename
6157164
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