DocumentCode :
3381171
Title :
Don´t let the X-bugs bite: Conquer elusive X-propagation issues early! Get them before they get you!
Author :
Piper, Lisa ; Zhang, Jin
Author_Institution :
Real Intent, Inc., Sunnyvale, CA, USA
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
345
Lastpage :
348
Abstract :
Designers spend many, many hours verifying that RTL provides the correct functionality and expect that gate level simulation produces the same results as RTL simulation. However, X-propagation is a major cause of differences between gate level and RTL simulation results, and issues cannot be detected by logical equivalence checkers. While most Xs are harmless at the RTL level, they can mask functional bugs. Resolving differences between gate level and RTL simulation results is painful and time consuming because Xs make correlation between the two difficult. X-propagation issues cause costly iterations, painful debug, and sometimes allow X-related functional bugs to slip through. This invited talk explains the common sources of Xs, shows how they can mask real functional issues and why they are difficult to avoid. It also presents a unique practical solution to assist designers in catching X-propagation bugs efficiently.
Keywords :
logic gates; logic simulation; RTL simulation; X-bugs bite; X-propagation bugs; X-related functional bugs; gate level simulation; logical equivalence checker; Logic gates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157192
Filename :
6157192
Link To Document :
بازگشت