Characterization of charge-pump rectifiers for standard submicron CMOS processes

This work presents an innovative approach in designing CMOS charge pumps for a 0.6 μm CMOS process for the control of floating-gate circuits. Central to this design are rectifier structures which would function best for both medium and high voltage applications. Shown in this paper are six different rectifier structures designed and fabricated in a standard 0.6 μm CMOS n-well double poly process along with experimental results. These rectifiers structures are then implemented in two stage Dickson charge pumps in a standard 0.6 μm CMOS process to determine their effectiveness. Experimental results show by way of comparison charge pump performance with the experimental results of the rectifying structures.