Title :
Low quiescent current variable output digital controlled voltage regulator
Author :
Hsieh, Wei-Chih ; Hwang, Wei
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
May 30 2010-June 2 2010
Abstract :
In this paper, a digital controlled push-pull linear voltage regulator is proposed. The designed regulator can provide a variable output voltage ranging from 0.5V to 1V in steps of 0.1V. It can supply a maximum of 100mA for each output level. A time interleaving control technique is also presented to enhance the output performance. By using UMC 65nm standard CMOS technology, the ripple of the output voltage when the load or output level changes is smaller than 10% of each specific output level. The current efficiency is 99.9% with only 126μA quiescent current.
Keywords :
CMOS integrated circuits; integrated circuit design; voltage regulators; current 100 mA; current 126 muA; digital controlled push-pull linear voltage regulator; low quiescent current variable output digital controlled voltage regulator; size 65 nm; standard CMOS technology; time interleaving control technique; voltage 0.5 V to 1 V; Analog circuits; Control systems; Digital circuits; Digital control; Dynamic voltage scaling; Electric variables control; Interleaved codes; Regulators; Switching converters; Voltage control;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537518
