An over-voltage protection circuit for CMOS power amplifiers

With increasing demand for higher integration and lower cost of mobile communication devices there is a growing trend towards the use of CMOS power amplifiers (PAs) instead of GaAs or SiGe PAs. Although being comparatively inexpensive, CMOS not only suffers from inferior RF performance but also from low breakdown voltages. This gets an issue especially for the PA output stage, when load mismatches lead to high voltage-standing wave ratios (VSWR) and therefore high peak voltages at the PA output. In this work a 27 dBm PA in 0.13 mum CMOS with an integrated VSWR protection circuit is presented. A control loop detects critically high voltage amplitudes at the PA output and reduces the PA gain in order to lower the output voltage swing to uncritical values.