DocumentCode
3381755
Title
Reduction of circuit complexity by elimination of internal nodes in the circuit modeling of planar interconnection structures
Author
Coen, Guy ; De Zutter, Daniel
Author_Institution
Dept. of Inf. Technol., Ghent Univ., Belgium
fYear
1995
fDate
2-4 Oct 1995
Firstpage
229
Lastpage
231
Abstract
The authors have developed a novel technique for the automatic derivation of equivalent RLC-networks for general microstrip interconnection discontinuities. An essential step in the technique is the reduction of the complexity of the complex lumped circuit model obtained by applying the method of moments to the considered microstrip discontinuity. In this paper, we present the concepts, algorithms and mathematical manipulations of this reduction scheme. The mathematics are based on the tensor analysis of networks and on network diakoptics, both developed by Kron
Keywords
equivalent circuits; lumped parameter networks; method of moments; microstrip discontinuities; network topology; algorithms; circuit complexity; equivalent RLC-networks; internal nodes; lumped circuit model; method of moments; microstrip discontinuities; network diakoptics; planar interconnections; tensor analysis; Complexity theory; Diakoptics; Impedance; Information technology; Integrated circuit interconnections; Mathematics; Microstrip; Moment methods; Tensile stress; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 1995
Conference_Location
Portland, OR
Print_ISBN
0-7803-3034-X
Type
conf
DOI
10.1109/EPEP.1995.524901
Filename
524901
Link To Document