Title :
Silt: the bit-parallel approach
Author :
Barman, Rod ; Bolotski, Michael ; Camporese, Daniel ; Little, James J.
Author_Institution :
Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada
Abstract :
A particular form of parallelism, called bit-parallelism, is introduced. A bit-parallel organization distributes each bit of a data item to a different processor. Bit-parallelism allows computation that is sublinear with word size for such operations as integer addition, arithmetic shifts, and data moves. The implications of bit-parallelism for system architecture are analyzed. An implementation of a bit-parallel architecture based on a mesh with a bypass network is presented. Using a conservative estimate for cycle time, a Silt processor performs 64-b integer additions more than 10 times faster than the Connection Machine-2. Using current CMOS technology, a 16 M processor Silt system would be capable of nearly 500 billion 32-b adds per second. The application of the architecture to low-level vision algorithms is discussed
Keywords :
computer vision; digital arithmetic; parallel architectures; parallel processing; Silt; arithmetic shifts; bit-parallel architecture; computer vision; integer addition; low-level vision; Application software; Arithmetic; Computer architecture; Computer science; Computer vision; Laboratories; Parallel processing; Performance analysis; Silicon; Very large scale integration;
Conference_Titel :
Pattern Recognition, 1990. Proceedings., 10th International Conference on
Conference_Location :
Atlantic City, NJ
Print_ISBN :
0-8186-2062-5
DOI :
10.1109/ICPR.1990.119378