DocumentCode
3382013
Title
A method for stability compensation of low-load-capacitor low-power LDO
Author
Mandal, Sajal Kumar
Author_Institution
STMicroelectronics, Greater Noida, Noida
fYear
2008
fDate
Aug. 31 2008-Sept. 3 2008
Firstpage
263
Lastpage
266
Abstract
A stability compensation method for low-load-capacitor low dropout regulator (LDO) is presented. A ldquozeropsilas frequency trackingrdquo as well as ldquonon-dominant parasitic polespsila frequency reshapingrdquo are performed to obtain nearly first order system behavior out of several quite unmanageable locations of pole-zero frequencies of uncompensated system. The LDO consumes 170 muA (including the consumption of reference circuit) over full load current range and is implemented on 0.13 mum CMOS technology.
Keywords
CMOS integrated circuits; capacitors; voltage regulators; CMOS technology; current 170 muA; low dropout regulator; low-load-capacitor low-power LDO; nondominant parasitic pole frequency reshaping; pole-zero frequency locations; size 0.13 mum; stability compensation method; zero frequency tracking; Bandwidth; Capacitors; Circuits; Clocks; Frequency; Paramagnetic resonance; Regulators; Stability; Transient response; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location
St. Julien´s
Print_ISBN
978-1-4244-2181-7
Electronic_ISBN
978-1-4244-2182-4
Type
conf
DOI
10.1109/ICECS.2008.4674841
Filename
4674841
Link To Document