DocumentCode :
3382073
Title :
A model for energy quantization of single-electron transistor below 10nm
Author :
Chen, Xiaobao ; Xing, Zuocheng ; Sui, Bingcai
Author_Institution :
Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
531
Lastpage :
534
Abstract :
Single-electronic transistor (SET) are considered as the attractive candidates for post-COMS VLSI due to their ultra-small size and low power consumption. Along with the size of coulomb island become smaller and smaller, the energy quantization of single electron transistor based on charge state come forth and from obviously to more obviously. A qualitative analysis to single-electron transistors base on charge state with discrete energy levels, is introduced in this paper. Compared with other analysis to single-electron transistor based on charge state without discrete energy levels, our result is close to fact. Through the comparison, it can be get that the former is accurate and close to fact compared with the simulator without discrete energy levels, and is very useful for the ASIC design of SET devices.
Keywords :
Coulomb blockade; semiconductor device models; single electron transistors; ASIC design; Coulomb island; SET device; discrete energy level; energy quantization; post-COMS VLSI; single-electron transistor; Analytical models; Logic gates; Energy quantization; discrete energy levels; orthodox theory; single electron transistor (SET);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157239
Filename :
6157239
Link To Document :
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