Design of a reference voltage for A/D converters

This paper discusses the successful implementation of a reference voltage circuit tailored to the needs the IAD GmbH DLC_2 family chip, which commonly encounter the demand for two high precision and high stability outputs; positive reference voltage vrefp and negative reference voltage vrefn, which define the dynamic range of the input signal of a successive approximation A/D converter. The chip developed in co-operation of IAD and MAZ Brandenburg, for power-line applications. The reference voltage circuit has been designed and fabricated using 0.35 mum CMOS switched capacitor double poly technology from AMS, and occupies a total area of only 0.084 mm². Simulations show that the voltages are well settled during the total conversion time. The circuit is capable of driving a 2.2 muF capacitor load at 25 MHz clock frequency while consuming 22 mW of power from a 3.3 V supply voltage.