DocumentCode :
3382299
Title :
An efficient solver for statistical capacitance extraction considering random process variations
Author :
Bai, Rubing ; Zeng, Shan ; Zhang, Qingqing ; Yu, Wenjian
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
566
Lastpage :
569
Abstract :
This paper presents an efficient solver for statistical capacitance extraction considering random process variations, which is written in C and named PSCap. The improved continuous surface variation (ICSV) model [1] is applied to accurately describe the variational geometry of VLSI interconnects. Meanwhile, the weighted PFA, HPC [5], and parallel computing techniques are employed to improve its efficiency. Numerical results show that for the typical 65nm-technology structures, PSCap is 30-40% faster than the statistical capacitance extraction program statcap [1], which was developed in MATLAB, on an 8-core machine. Another contribution of PSCap is that it is able to handle multilayer structures, which statcap fails to handle, producing accurate results with less than 5% error.
Keywords :
C language; VLSI; capacitance; electronic engineering computing; integrated circuit design; integrated circuit interconnections; parallel processing; random processes; statistical analysis; C language; HPC; ICSV model; PSCap; VLSI interconnects; improved continuous surface variation; multilayer structure; parallel computing; random process variation; size 65 nm; statistical capacitance extraction; variational geometry; weighted PFA; Capacitance; Computer languages; Mathematical model; Symmetric matrices; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157268
Filename :
6157268
Link To Document :
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