Title :
A new dynamic differential logic style as a countermeasure to power analysis attacks
Author :
Giancane, L. ; Marietti, P. ; Olivieri, M. ; Scotti, G. ; Trifiletti, A.
Author_Institution :
Dipt. di Ing. Elettron., Univ. di Roma La Sapienza, Rome
fDate :
Aug. 31 2008-Sept. 3 2008
Abstract :
Power analysis attacks exploit the existence of ldquoside channelsrdquo in implementations of cryptographic algorithms to extract secret data. The scientific literature reports consolidated methods - such as Differential Power Analysis (DPA) and Simple Power Analysis (SPA) - for extracting a secret cryptographic key through the sensing of the hardware power consumption. We propose a novel dynamic and differential CMOS logic style as a countermeasure against power attacks on cryptographic devices. The proposed logic family exploits the idea of using signals with 3 possible states and operates with power consumption ideally independent on both the logic values and the sequence of data. We have designed a set of logic gates, flip flops and a simple S-BOX, and compared the S-BOX against previously published secure logic styles in terms of transistor count, power consumption and correlation between data and power dissipation.
Keywords :
CMOS logic circuits; cryptography; flip-flops; logic gates; differential CMOS logic style; dynamic CMOS logic style; dynamic differential logic style; flip flops; logic gates; logic values; power analysis attacks; power consumption; secret cryptographic key; simple S-BOX; simple power analysis; transistor count; Algorithm design and analysis; CMOS logic circuits; Cryptography; Data mining; Energy consumption; Hardware; Logic design; Logic devices; Logic gates; Power dissipation;
Conference_Titel :
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location :
St. Julien´s
Print_ISBN :
978-1-4244-2181-7
Electronic_ISBN :
978-1-4244-2182-4
DOI :
10.1109/ICECS.2008.4674866