Design of a 2 μW RFID baseband processor featuring an AES cryptography primitive

Cheap passive radio frequency identification (RFID) tags operating in ultra high frequency (UHF) bands are fostering innovation in several field such as building access control, goods tracking and supply chains management. RFID transponders can also be coupled to tiny sensors, enabling non invasive monitoring of environmental and personal parameters. To ensure the privacy of highly sensitive data, encryption and authentication capabilities should be embedded in RFID devices, in a fashion compatible with tight power budgets of wireless devices. In this contribution, a baseband-processor is introduced, which complies with ISO 18000-6C (EPC Class1 Gen2) protocol and integrates AES primitives aimed at secure data transmission. Performance of passive RFID devices is limited by the available power, harvested from the incoming radiation. Power-saving strategies are devised, both at the system and the circuit levels. A set of standard cells has been designed, suitable for near-threshold voltage operations. Physical implementation on CMOS 0.18 mum technology has been carried out and the chip has being fabricated.