A novel heuristic for the optimal design of LC voltage controlled oscillators

We propose a heuristic for the optimal sizing of LC VCO. The heuristic is an algorithm driven methodology that allows us determining optimal sizes of inductors, bias current and channel widths that minimizes the VCOpsilas phase noise. The proposed optimization methodology was applied to size a cross-coupled differential voltage controlled oscillator. This latter, designed using AMS 0.35 mum technology, achieves -118.75 dBc/Hz at 1 MHz offset from a 5.4 GHz carrier frequency with 8.0 mW consumption power.