A thermal model for the top layer of 3D integrated circuits considering through silicon vias

Based on the analytical thermal model for the top layer of three-dimensional integrated circuits (3D ICs) without through silicon vias (TSVs), the corresponding analytical thermal model taking TSVs into account is proposed. TSVs density ρ and effective thermal conductivity is introduced in this paper. The simulation results show that, the temperature increases sharply with the decrease of ρ for more layers and smaller ρ, and the best range of TSVs density ρ is 0.5% to 1% for an 8-layer 3D IC. These results can be effectively used as design guidelines in 3D IC thermal management studies.