Title :
Fan-in sensitive low power dynamic circuits performance statistical characterization
Author :
Wang, Jinhui ; Gong, Na ; Wu, Wuchen ; Hou, Ligang
Author_Institution :
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
Abstract :
Using neural networks, a highly reliable and precise system to display low power dynamic circuit performance statistical characterization is proposed in this paper. The proposed model successfully estimates the nonlinear changing of the leakage power, the active power and the delay of the different fan-in low power dynamic gates with the dual threshold voltage technique, the multiple-supply technique and the sleep transistor technique. At last, the precision priority of estimating system is obtained.
Keywords :
circuit analysis computing; neural nets; nonlinear estimation; transistors; delay; dual threshold voltage technique; fan-in low power dynamic gates; fan-in sensitive low power dynamic circuits; leakage power; multiple-supply technique; neural networks; nonlinear estimation; sleep transistor technique; statistical characterization; Artificial neural networks; Clocks; Delay; Estimation; Logic gates; Transistors; Very large scale integration;
Conference_Titel :
SOC Conference (SOCC), 2010 IEEE International
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-6682-5
DOI :
10.1109/SOCC.2010.5784655