DocumentCode :
3383098
Title :
Integrated parallel image processings on a pipelined MIMD multi-processor system PSM
Author :
Deguchi, Koichiro ; Tago, Kazuya ; Morishita, Iwao
Author_Institution :
Fac. of Eng., Tokyo Univ., Japan
Volume :
ii
fYear :
1990
fDate :
16-21 Jun 1990
Firstpage :
442
Abstract :
Efficient image processing from a low level to a higher level on a PSM system is described. PSM is a multiprocessor system architecture with pipelined multiple-instruction multiple-data (MIMD) processors, shared memory, and a multistage interconnection network designed for high-speed parallel image processing. A parallel image processor, PSM-32, which is being constructed based on the PSM architecture, is discussed. To ensure total efficient instruction and data flows in the presence of the memory access delays commonly occurring on a multistage interconnection network machine, an architecture with a pipelined MIMD processor is proposed for the PSM system
Keywords :
computer vision; computerised picture processing; multiprocessing systems; parallel architectures; parallel machines; pipeline processing; PSM-32; computer vision; computerised picture processing; data flows; image processings; multiprocessor system architecture; multistage interconnection network; parallel architectures; parallel processing; pipeline processing; pipelined MIMD processor; shared memory; Data structures; Delay; Hardware; Image analysis; Image processing; Image segmentation; Image sequence analysis; Multiprocessor interconnection networks; Pixel; Streaming media;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Pattern Recognition, 1990. Proceedings., 10th International Conference on
Conference_Location :
Atlantic City, NJ
Print_ISBN :
0-8186-2062-5
Type :
conf
DOI :
10.1109/ICPR.1990.119398
Filename :
119398
Link To Document :
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