A novel test environment for template based QDI asynchronous circuits

Author

Salehpour, A.-A. ; Zamani, M. ; Rahmani, A.-M. ; Mohammadi, S. ; Pedram, H. ; Marvasti, M.B.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran

fYear

2008

fDate

Aug. 31 2008-Sept. 3 2008

Firstpage

526

Lastpage

529

Abstract

In this paper, we propose an efficient test environment for template based asynchronous circuits. This test environment consists of two major parts: fault simulation and test pattern generation. The fault simulation is based on exploring fault effect on quasi-delay insensitive asynchronous circuits that detects any changes in sequences of predefined signals. The test pattern generation is a high level method based on signal transition graph. The effectiveness of the proposed test environment is shown by experimental results on a set of benchmarks given in the form of templates.

Keywords

asynchronous circuits; fault simulation; high level method; quasi-delay insensitive asynchronous circuits; signal transition graph; template based QDI asynchronous circuits; test pattern generation; Asynchronous circuits; Circuit faults; Circuit simulation; Circuit testing; Clocks; Computational modeling; Delay; Electrical fault detection; Fault detection; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on

Conference_Location

St. Julien´s

Print_ISBN

978-1-4244-2181-7

Type

conf

DOI

10.1109/ICECS.2008.4674906

Filename

4674906