DocumentCode
3383548
Title
Dynamically adaptable architecture for real-time video processing
Author
Ngan, Nicolas ; Dokladalova, Eva ; Akil, Mohamed ; Contou-Carrere, Francois
Author_Institution
Equipe A3SI, Lab. Inf. Gaspard Monge, France
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
4125
Lastpage
4128
Abstract
In this paper, we present a new adaptable ring-based architecture for video processing applications. The proposed architecture allows handling pipelined and parallel organization of computation for multiple video flows. A simplified version with four nodes has been implemented on an FPGA for a video application to show the adaptation mechanism between a pipelined and parallel structure.
Keywords
field programmable gate arrays; parallel architectures; video signal processing; FPGA; adaptable ring-based architecture; dynamically adaptable architecture; field programmable gate array; parallel structure; pipelined structure; real-time video processing; Computer architecture; Concurrent computing; Delay; Embedded computing; Field programmable gate arrays; Image fusion; Image resolution; Image sensors; Pipelines; Video equipment;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537617
Filename
5537617
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