DocumentCode
3383925
Title
A CMOS Sub-l-V nanopower current and voltage reference with leakage compensation
Author
Huang, Zhangcai ; Luo, Qin ; Inoue, Yasuaki
Author_Institution
Fukuoka Ind., Sci. & Technol. Found. (Fukuoka IST), Fukuoka, Japan
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
4069
Lastpage
4072
Abstract
In this paper, a CMOS sub-1-V nanopower reference is proposed, which is implemented without resistors and with only standard CMOS transistors. The proposed circuit has the most attractive merit that it can afford reference current and reference voltage simultaneously. Moreover, the leakage compensation technique is utilized, and thus it has very low temperature coefficient for a wide temperature range. The proposed circuit is verified by SPICE simulation with CMOS 0.18um process. The temperature coefficient of the reference voltage and reference current are 0.0037%/°C and 0.0091%/°C, respectively. Also, the power supply voltage can be as low as 0.85V and its power consumption is only 5.1nW.
Keywords
CMOS integrated circuits; integrated circuit modelling; leakage currents; low-power electronics; transistors; CMOS nanopower current; CMOS transistors; SPICE simulation; leakage compensation technique; power 5.1 nW; reference current; reference voltage; size 0.18 mum; voltage 1 V; CMOS process; CMOS technology; Circuits; Energy consumption; MOSFETs; Power supplies; Resistors; Temperature distribution; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537636
Filename
5537636
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