• DocumentCode
    3383937
  • Title

    Towards formal system-level verification of security requirements during hardware/software codesign

  • Author

    Loinig, Johannes ; Steger, Christian ; Weiss, Reinhold ; Haselsteiner, Ernst

  • Author_Institution
    Inst. for Tech. Inf., Graz Univ. of Technol., Graz, Austria
  • fYear
    2010
  • fDate
    27-29 Sept. 2010
  • Firstpage
    388
  • Lastpage
    391
  • Abstract
    Today´s embedded systems have to fulfill sophisticated security requirements. They have a deep impact into the system´s design. Security can only be achieved if security requirements are considered during the system-wide design and development process. In this concept work we propose a hardware/software codesign approach that addresses functional security requirements during all design and development phases of a system.
  • Keywords
    formal specification; formal verification; hardware-software codesign; security of data; development process; embedded systems; formal system-level verification; hardware/software codesign; sophisticated security requirements; system-wide design; Embedded systems; Hardware; Java; Security; Smart cards; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2010 IEEE International
  • Conference_Location
    Las Vegas, NV
  • ISSN
    Pending
  • Print_ISBN
    978-1-4244-6682-5
  • Type

    conf

  • DOI
    10.1109/SOCC.2010.5784702
  • Filename
    5784702