VLSI Architecture Design for Concatenative Speech Synthesizer

This paper presents a VLSI architecture for Mandarin speech synthesis. For the natural synthesized speech, subsyllable based synthesis units are recorded in advance. The synthesized speech is obtained by suitably concatenating the synthesis units. The TD-PSOLA (time domain pitch synchronous overlap-and-add) approach is used to perform the prosody modification. The proposed VLSI architecture includes two parts: the TD-PSOLA module and the synthesized pitch period generator. In the TD-PSOLA module, we also present a fast CORDIC architecture which is five times faster than the conventional method.