DocumentCode :
3384321
Title :
Efficient temporal task partition for coarse-grain reconfigurable systems based on Simulated Annealing Genetic Algorithm
Author :
Zhou, Yifan ; Sheng, Weiguang ; Liu, Xie ; He, Weifeng ; Mao, Zhigang
Author_Institution :
Sch. of Microelectron., Shanghai Jiaotong Univ., Shanghai, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
941
Lastpage :
944
Abstract :
A Simulated Annealing Genetic Algorithm (SAGA) with greedy mapping mechanism is developed to solve task partitioning problems in coarse grain reconfigurable systems. A fitness function combined multiple objectives (communication cost, number of partitions and number of bypass nodes) is constructed to optimize the execution time. Experimental results show that SAGA produces better solutions than traditional level-based or clustering-based partitioning algorithm. The operation time saved is up to 5% compared with level-based algorithm, and critical parameters such as communication cost and number of partitions are reduced by 10% in average.
Keywords :
genetic algorithms; greedy algorithms; microprocessor chips; reconfigurable architectures; simulated annealing; bypass node number; clustering-based partitioning; coarse-grain reconfigurable systems; communication cost; fitness function; greedy mapping; multiple objectives; partition number; simulated annealing genetic algorithm; temporal task partition; Parallel processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157361
Filename :
6157361
Link To Document :
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