DocumentCode
3384350
Title
Continuous Time Cascade Sigma Delta Modulator without digital cancellation filters
Author
Patón, S. ; Torreno, J.A. ; Prefasi, E. ; Hernández, L.
Author_Institution
Carlos III Univ. of Madrid, Leganes, Spain
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
4009
Lastpage
4012
Abstract
This work presents a design procedure for Continuous Time (CT) Cascade Sigma Delta Modulators (SDMs) using the Sturdy approach for Discrete Time Modulators, where the usual Digital Cancellation Filters are removed. The error cancellation mechanism is affected by excess loop delay in the CT approach. Special design considerations are derived and a specific design methodology is proposed. A 10-MHz bandwidth and 80-dB peak SNR example is designed and simulated using a 2-1 topology.
Keywords
sigma-delta modulation; CT cascade SDM; Sturdy approach; bandwidth 10 MHz; continuous time cascade sigma delta modulator; digital cancellation filters; discrete time modulators; error cancellation mechanism; loop delay; Bandwidth; Delay; Delta modulation; Delta-sigma modulation; Design methodology; Digital filters; Digital modulation; Energy consumption; Quantization; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537655
Filename
5537655
Link To Document