DocumentCode
3384563
Title
QuteVP: A multi-million-instructions-per-second virtual platform for SoC hardware/software co-design
Author
Lin, Kuen-Huei ; Li, Yuan-Lung ; Yeh, Yufu ; Huang, Chung-Yang
Author_Institution
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2009
fDate
23-25 July 2009
Firstpage
1144
Lastpage
1148
Abstract
In this paper, we proposed and implemented a virtual platform, QuteVP, that can simulate multi-million-instructions per second under the cycle-count accurate model. This is achieved by two major contributions: first, we devised a data-dependency aware virtual synchronization algorithm (DAVSA) to eliminate the unnecessary context switches in the simulation process, and second, we simplify the OS porting process by building the OS kernel image directly and specifically for the virtual platform. The experimental results show that our virtual platform can execute on the average 3 to 5 million instructions per second and bring up the uCLinux OS within just about 10 seconds. With the high performance simulation engine and the flexible OS porting, our QuteVP will serve as a very solid platform for the future SoC hardware/software co-design paradigm.
Keywords
Linux; hardware-software codesign; system-on-chip; QuteVP; SoC hardware/software co-design; cycle-count accurate model; data-dependency aware virtual synchronization algorithm; flexible OS porting; multi-million-instructions-per-second virtual platform; uCLinux OS; Computational modeling; Computer crashes; Context awareness; Context modeling; Debugging; Hardware; Kernel; Software performance; Solid modeling; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location
Milpitas, CA
Print_ISBN
978-1-4244-4886-9
Electronic_ISBN
978-1-4244-4888-3
Type
conf
DOI
10.1109/ICCCAS.2009.5250315
Filename
5250315
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