Design and analysis of an advanced static blocked multithreading architecture

Blocked multithreading architecture can overcome several drawbacks of interleaved multithreading architecture. However, it introduces context switching penalty which degrades the overall performance. We propose an advanced static blocked multithreading architecture that avoids the context switching penalty while maintains the single thread performance. An analytical method for multithreading architecture performance evaluation is presented, followed by the simulation results demonstrating the advantage of the proposed architecture in terms of its performance.