Power noise suppression technique using active decoupling capacitor for TSV 3D integration

Author

Lin, Tien-Hung ; Huang, Po-Tsang ; Hwang, Wei

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2010

fDate

27-29 Sept. 2010

Firstpage

209

Lastpage

212

Abstract

In three-dimensional (3D) integration, the increasing supply current through both package and through-silicon-via (TSV) would lead to a large simultaneous switching noise potentially. In this paper, a noise suppression technique using low power active decoupling capacitors (DECAPs) is proposed for TSV 3D integration. Through the latch-based noise detection circuitry, the power supply noise can be detected and regulated via active DECAPs. Based on UMC 65 nm CMOS technology and TSV model at 1 V supply voltage, the proposed noise suppression circuit can realize maximum 7.4 dB supply noise reduction and 12 X boost fact at the resonant frequency.

Keywords

CMOS integrated circuits; capacitors; integrated circuit noise; low-power electronics; three-dimensional integrated circuits; CMOS technology; TSV 3D integration; active DECAP; latch-based noise detection circuitry; low power active decoupling capacitor; power noise suppression technique; power supply noise; resonant frequency; size 65 nm; supply current; supply noise reduction; switching noise; through-silicon-via; voltage 1 V; CMOS integrated circuits; Integrated circuit modeling; Logic gates; Solid modeling; Switches; Three dimensional displays; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference (SOCC), 2010 IEEE International

Conference_Location

Las Vegas, NV

ISSN

Pending

Print_ISBN

978-1-4244-6682-5

Type

conf

DOI

10.1109/SOCC.2010.5784737

Filename

5784737