The design of a high speed and high precision sigma-delta modulator

A 4-order single-loop single-bit digital sigma-delta modulator with 16-bit-precision and its interpolation filters are designed in this paper. Furthermore, behavioral simulations of the design are verified in Simulink. A top-down system design methodology that can be used to determine the degree of influence of the modulator structure parameters on the performance of the modulator is provided. This approach not only provides important guiding significance on implement of the modulator in an FPGA processor, but also reduces the design complexity and shortens the integrated circuit(IC) design cycle of the modulation system. Finally, circuit design of the digital sigma-delta modulator with an input signal bandwidth of 20kHz and over-sampling rate of 64, that is the sampling rate of 2.56MHz, was initially realized in an FPGA processor, based on behavioral simulations, which provides some guiding significance for future high-speed design and application of the digital sigma-delta modulator.