Title :
A charge-pump circuit to restrain reference spurs in the PLL
Author :
Huan, Changhong ; Wu, Xiushan ; Wang, Dan
Author_Institution :
Coll. of Electr. & Mech. Eng., China Jiliang Univ., Hangzhou, China
Abstract :
In the charge pump phase locked loop (CPPLL), the non-ideal characteristics of charge pump are the main causes of the reference spurs. Therefore, reducing the variety of non-ideal characteristics is one of the challenges in the CP design. In this paper, an improved charge pump circuit, based on the TSMC´s 0.18μmCMOS process, has been designed and completed. An operational amplifier and self-biasing cascode current mirror and supply-independent reference current source are used in the CP design to make charge and discharge current matched. The charge pump has characteristics of low power consumption, high speed, good linearity, and high current matching.
Keywords :
CMOS integrated circuits; charge pump circuits; operational amplifiers; phase locked loops; PLL; TSMC CMOS process; charge pump phase locked loop; charge-pump circuit; nonideal characteristics; operational amplifier; reference spurs; self-biasing cascode current mirror; size 0.18 mum; supply-independent reference current source; CMOS integrated circuits; Capacitance; Charge pumps; Discharges; Frequency synthesizers; Generators; Phase frequency detector; charge pump; current matching; phase locked loop; reference spurs;
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
DOI :
10.1109/ASICON.2011.6157378
