DocumentCode
3385130
Title
A fast routability-driven router for Hierarchical FPGAs based on Tabu search
Author
Zhang, Xingxing ; Zhou, Qiang ; Cai, Yici
Author_Institution
EDA Lab., Tsinghua Univ., Beijing, China
fYear
2009
fDate
23-25 July 2009
Firstpage
1052
Lastpage
1056
Abstract
In this paper, we propose a fast routability-driven routing algorithm for hierarchical FPGAs (HFPGAs), using several strategies to steer the automated process of rip up and reroute in order to speed up the process and reach the same effectiveness of Pathfinder´s negotiation mechanism. Net is expelled from congestion zone to resourceful zone. The algorithm is divided into two procedures. First, it generates an initial solution by routing nets in a descent order, then applies TS strategy to guide the generation of new solution during the iterations of rip-up and reroute. The process terminates when obtaining a feasible solution without congestion or when iteration time is out. Experimental results show the effectiveness of our algorithm both in quality and speed compared with Pathfinder.
Keywords
field programmable gate arrays; network routing; search problems; Pathfinders negotiation; congestion zone; fast routability-driven routing algorithm; hierarchical FPGAs; reroute automated process; resourceful zone; rip up automated process; tabu search; Field programmable gate arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location
Milpitas, CA
Print_ISBN
978-1-4244-4886-9
Electronic_ISBN
978-1-4244-4888-3
Type
conf
DOI
10.1109/ICCCAS.2009.5250341
Filename
5250341
Link To Document