Energy-efficient asynchronous delay element with wide controllability

This paper proposes an energy-efficient asynchronous tunable delay element architecture, appropriate for low-to high-speed digital applications. The delay is made controllable via control currents. The presented delay cell improves upon the efficient thyristor-like-based circuits in prior art by reusing the charge supplied on one edge of the input during the next edge of the input. Over 50% energy reduction is achieved.