A Nanowire Array for Reconfigurable Computing

A fine-grained reconfigurable array based on complementary, dual-gate, fully depleted, silicon on insulator (DGFD-SOI) nanowire transistors is proposed and analyzed. Both low power and reconfigurable operation may be achieved by altering the switching threshold of the array using the back-gate bias on the complementary double-gate transistors. Simulated performance figures are presented for the array when configured into representative circuits and compared with two similar self-assembled molecular arrays. It is shown that SOI nanowire arrays can achieve dense, low-power reconfigurable operation without the overheads of either level restoration or additional gain blocks that may be required by molecular-based systems.