Title :
Using temporal constraints for eliminating crosstalk candidates for design and test
Author :
Margolese, Michael A. ; Ferguson, F. Joel
Author_Institution :
California Univ., Santa Cruz, CA, USA
Abstract :
This paper describes a simple algorithm for eliminating possible aggressor-victim net pairs for crosstalk analysis. This algorithm makes use of the observation that timing constraints in sequential circuits apply to crosstalk induced pulses. We show how this algorithm can be applied to a design to prune the candidate list for ATPG to detect crosstalk glitches that are introduced by manufacturing defects
Keywords :
VLSI; automatic test pattern generation; crosstalk; integrated circuit testing; production testing; sequential circuits; timing; ATPG; VLSI; aggressor-victim net pairs; candidate list; crosstalk analysis; crosstalk glitches; manufacturing defects; sequential circuits; temporal constraints; timing constraints; Algorithm design and analysis; Automatic test pattern generation; Circuit faults; Clocks; Coupling circuits; Crosstalk; Flip-flops; Identity-based encryption; Testing; Timing;
Conference_Titel :
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location :
Dana Point, CA
Print_ISBN :
0-7695-0146-X
DOI :
10.1109/VTEST.1999.766650
