DocumentCode :
3386289
Title :
Performance and processing time enhancement of LDPC decoder using stopping node modified Sum Product algorithm
Author :
Linh, Nguyen Thi Dieu ; Wang, Gang ; Barkana, Abdelhafidh ; Rugumira, Georgia
Author_Institution :
Sch. of Electron. & Inf. Eng., Harbin Inst. of Technol., Harbin, China
fYear :
2011
fDate :
25-28 Sept. 2011
Firstpage :
118
Lastpage :
121
Abstract :
In this paper, a new method based on Sum Product algorithm (SPA) using stopping node to reduce computing complexity on Low Density Parity Check Codes (LDPC) decoding algorithms is presented. We show how to make early decisions to reduce calculation of the next iteration. Simulation results show that performance of iterative decoding for LDPC codes using stopping node algorithm can reduce up to 10 times computational complexity with maintaining quality level.
Keywords :
computational complexity; iterative decoding; parity check codes; LDPC decoding algorithm; computational complexity reduction; iterative decoding; low density parity check codes decoding algorithm; processing time enhancement; quality level maintenance; stopping node modified sum product algorithm; Algorithm design and analysis; Bit error rate; Decoding; Digital video broadcasting; Iterative decoding; Tin; Low Density Parity Check Codes; SP algorithm; iterative decoding; stopping nodes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communication Technology (ICCT), 2011 IEEE 13th International Conference on
Conference_Location :
Jinan
Print_ISBN :
978-1-61284-306-3
Type :
conf
DOI :
10.1109/ICCT.2011.6157845
Filename :
6157845
Link To Document :
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