DocumentCode :
3386433
Title :
A low power low noise amplifier for portable GPS receivers
Author :
Xia, Wenbo ; Zhang, Xiaolin
Author_Institution :
Sch. of Electron. Inf. Eng., Beihang Univ., Beijing, China
fYear :
2009
fDate :
23-25 July 2009
Firstpage :
793
Lastpage :
796
Abstract :
An integrated 1.5 GHz low power Low Noise Amplifier (LNA) for portable global positioning system (GPS) receivers is proposed based on SMIC 180 nm 1P6M RF CMOS process. The MOS transistors in the proposed LNA are biased in moderately inverted region to achieve low power. The post-layout simulation results show that, at worst case, a voltage gain of 19 dB is achieved with noise figure (NF) of 4.2 dB, an input third order intermodulation point (IIP3) of -14 dBm and an input return loss of -8 dB. The power consumption of the circuit is only 1 mW at supply voltage of 0.7 V. The ratio of gain to dc power consumption is 19 dB/mW.
Keywords :
CMOS integrated circuits; Global Positioning System; MOSFET; low noise amplifiers; low-power electronics; radio receivers; MOS transistors; SMIC 1P6M RF CMOS process; gain 19 dB; gain 8 dB; input third order intermodulation point; integrated LNA; low-power low-noise amplifier; noise figure 4.2 dB; portable GPS receivers; portable global positioning system; post-layout simulation; power 1 mW; size 180 nm; voltage 0.7 V; CMOS process; Circuit simulation; Energy consumption; Gain; Global Positioning System; Low-noise amplifiers; MOSFETs; Radio frequency; Radiofrequency amplifiers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location :
Milpitas, CA
Print_ISBN :
978-1-4244-4886-9
Electronic_ISBN :
978-1-4244-4888-3
Type :
conf
DOI :
10.1109/ICCCAS.2009.5250406
Filename :
5250406
Link To Document :
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