• DocumentCode
    3386761
  • Title

    Provably good algorithm for low power consumption with dual supply voltages

  • Author

    Chunhong Chen ; Sarrafzadeh, M.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL, USA
  • fYear
    1999
  • fDate
    7-11 Nov. 1999
  • Firstpage
    76
  • Lastpage
    79
  • Abstract
    The dual-voltage approach has emerged as an effective and practical technique for power reduction. In this paper, we explore power optimization with dual supply voltages under given timing constraints. By analyzing the relations among the timing slack, delay and power consumption in a given circuit, we relate the voltage-scaling power optimization to the maximal weighted independent set (MWIS) problem, which is polynomial-time solvable on a transitive graph. Then we develop a provably good lower-bound algorithm based on MWIS to generate the lower bound of the power consumption. Also, we propose a fast approach to predict the optimum supply voltages. The maximum power reduction is obtained by using a modified lower-bound algorithm with optimum voltages. Experimental results show that the resulting lower bound is tight for most circuits and that the estimated optimum supply voltage is exactly, or very close to, the best choice of actual voltages.
  • Keywords
    CMOS logic circuits; VLSI; circuit optimisation; combinational circuits; computability; electric potential; electronic engineering computing; graph theory; low-power electronics; power consumption; delay; dual supply voltages; maximal weighted independent set problem; optimum supply voltage prediction; polynomial-time solution; power consumption; power reduction; provably good lower-bound algorithm; timing constraints; timing slack; transitive graph; voltage-scaling power optimization; Combinational circuits; Constraint optimization; Delay; Energy consumption; High performance computing; Polynomials; Power generation; Switching circuits; Timing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1999. Digest of Technical Papers. 1999 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA, USA
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-5832-5
  • Type

    conf

  • DOI
    10.1109/ICCAD.1999.810625
  • Filename
    810625