• DocumentCode
    3386881
  • Title

    Negative bias temperature instability of deep sub-micron p-MOSFETs under pulsed bias stress

  • Author

    Zhu, B. ; Suehle, J.S. ; Chen, Y. ; Bernstein, J.B.

  • Author_Institution
    Center for Reliability Eng., Maryland Univ., College Park, MD, USA
  • fYear
    2002
  • fDate
    21-24 Oct. 2002
  • Firstpage
    125
  • Lastpage
    129
  • Abstract
    Negative bias temperature instability (NBTI) and Positive bias temperature instability (PBTI) of p-MOSFETs with 2.4 nm thick oxide films were studied. The ΔVth interface trap generation of p-MOSFET at DC and AC bias stresses with frequency up to 500 KHz were measured. Additional tests were also conducted under unipolar and bipolar bias stresses with varied stress on and off times. The ΔVth and interface trap generation of p-MOSFET were observed to be significantly reduced for pulsed bias repetition frequencies greater than 10 KHz. However, ΔVth of PBTI was almost independent of the bias stress frequency. These results suggested that there are different mechanisms for NBTI and PBTI phenomena, and the reliability specifications of NBTI could possibly be relaxed under certain pulsed operation conditions.
  • Keywords
    MOSFET; interface states; semiconductor device reliability; 10 to 500 kHz; deep-submicron p-MOSFET; frequency dependence; interface trap generation; negative bias temperature instability; positive bias temperature instability; pulsed bias stress; reliability; threshold voltage shift; ultrathin oxide film; AC generators; DC generators; Frequency measurement; MOSFET circuits; Negative bias temperature instability; Niobium compounds; Pulse generation; Stress measurement; Testing; Titanium compounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 2002. IEEE International
  • Print_ISBN
    0-7803-7558-0
  • Type

    conf

  • DOI
    10.1109/IRWS.2002.1194248
  • Filename
    1194248