Title :
How to check the design for the possible reliability problems?
Author_Institution :
Intel Corporation, Dupont, WA, USA
Abstract :
Design reliability verification methodologies and software tools are discussed. Part of each methodology is creating a model that would describe the degradation process in a device or in a metallization layer. Examples of better modeling that would make design verification more efficient are given.
Keywords :
electronic design automation; metallisation; semiconductor device models; semiconductor device reliability; degradation model; design reliability verification methodology; metallization layer; semiconductor device; software tool; Analytical models; Circuit simulation; Crosstalk; Degradation; Electric breakdown; Electrons; Electrostatic discharge; MOS devices; Timing; Voltage;
Conference_Titel :
Integrated Reliability Workshop Final Report, 2002. IEEE International
Print_ISBN :
0-7803-7558-0
DOI :
10.1109/IRWS.2002.1194252
