Title :
Synthesis of X-tolerant convolutional compactors
Author :
Rajski, Janusz ; Tyszer, Jerzy
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
Abstract :
The paper presents a very efficient method for synthesis of convolutional compactors capable of tolerating a number of unknown states in a single time frame while providing very high compaction ratios.
Keywords :
built-in self test; data compression; fault tolerance; integrated circuit testing; X-tolerant convolutional compactor synthesis; embedded testing; fault tolerance; Circuit testing; Combinational circuits; Compaction; Convolutional codes; Graphics; Impulse testing; Manufacturing; Paper technology; Polynomials; Time factors;
Conference_Titel :
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
Print_ISBN :
0-7695-2314-5
DOI :
10.1109/VTS.2005.81
