• DocumentCode
    3387306
  • Title

    A new approach in flash-memory testing to increase quality and reduce cycle time on improvements

  • Author

    Giglio, G. ; Masi, T. ; Mastrocola, M. ; Morgana, F.

  • Author_Institution
    STMicroelectronics, Catania, Italy
  • fYear
    2002
  • fDate
    21-24 Oct. 2002
  • Firstpage
    199
  • Lastpage
    201
  • Abstract
    We have developed a methodology to reduce cycle time on improvements in FLASH-Memory 0.18um CMOS devices, utilizable on all non-volatile memories. With this method it is possible to perform speedily all improvements even having statistic on few devices.
  • Keywords
    CMOS memory circuits; flash memories; integrated circuit testing; 0.18 micron; CMOS device; cycle time; flash memory testing; nonvolatile memory; quality level; Costs; Databases; Design engineering; Failure analysis; Feedback; Flowcharts; Manufacturing; Nonvolatile memory; Statistics; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 2002. IEEE International
  • Print_ISBN
    0-7803-7558-0
  • Type

    conf

  • DOI
    10.1109/IRWS.2002.1194268
  • Filename
    1194268
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3387306