DocumentCode
3387310
Title
A method for the generation of HDL code at the RTL level from a high-level formal specification language
Author
Kountouris, ADostolos A. ; Wolinski, ChristoDhe
Author_Institution
IRISA, Rennes, France
Volume
2
fYear
1997
fDate
3-6 Aug. 1997
Firstpage
1095
Abstract
In this paper a method for generating HDL code from SIGNAL formal specifications, is described. Applying two transformations on the initial specification yields functionally equivalent RTL HDL code. The functional equivalence is formally proven. The methodology allows component re-usability and enables the validation of their integration at the specification level. We anticipate that the principles presented in this paper, will be applied in the framework of a cooperation with Motorola.
Keywords
formal specification; hardware description languages; logic CAD; program compilers; HDL code generation; RTL level; SIGNAL formal specifications; component re-usability; high-level formal specification language; Circuits; Equations; Formal languages; Formal specifications; Hardware design languages; Libraries; Signal generators; Signal processing; Signal resolution; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.662268
Filename
662268
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