DocumentCode
3387459
Title
Static compaction of delay tests considering power supply noise
Author
Wang, Jing ; Qiu, Wangqi ; Fancler, Steve ; Walker, D.M.H. ; Lu, Xiang ; Yue, Ziding ; Shi, Weiping
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
2005
fDate
1-5 May 2005
Firstpage
235
Lastpage
240
Abstract
Excessive power supply noise can lead to overkill during delay test. A static compaction algorithm is described in this paper that prevents such overkill. A power supply noise estimation tool has been built and integrated into the compaction process. Compaction results for KLPG delay tests for ISCAS89 circuits under different power grid environments are presented.
Keywords
compaction; integrated circuit modelling; integrated circuit testing; power supply circuits; ISCAS89 circuits; KLPG delay tests; power supply noise; static compaction algorithm; Circuit faults; Circuit noise; Circuit testing; Compaction; Crosstalk; Delay; Noise generators; Noise level; Power supplies; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
ISSN
1093-0167
Print_ISBN
0-7695-2314-5
Type
conf
DOI
10.1109/VTS.2005.77
Filename
1443429
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